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ASML & High-NA, Broadcom Sell Off, XPUs vs GPUs

Leading Edge Semis

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Tech Fund
Dec 20, 2025
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ASML faced bearish market sentiment at the start of this year on the back of weak order flow and with bears arguing that litho spend had peaked. However, for those who understand how Moore’s law ties back to litho spending, always knew that further scaling will require either EUV multiple patterning or more advanced equipment at higher ASPs (high-NA). Both scenarios work well for ASML – in scenario 1, ASML would sell more EUV tools which come at high margins, while in scenario 2, ASML could scale up its high-NA business. UBS is now seeing scenario 2 play out, with high-NA starting to ramp strongly later this decade already:

“We revisit why high NA is likely to be adopted and update the latest evidence/data supporting its adoption: Why? 1) new data suggest high NA could lead to 20-40% cost saving vs double or even triple patterning critical layers; 2) We identify 3 specific critical layers for logic likely to adopt high NA and 2 for memory; 3) Advanced logic roadmap confirms that the below 20nm metal pitch at A10 node (tools in 2029-30, mass production 2031) will likely require triple patterning low NA if high NA is not adopted; When? 4) latest data suggests tools availability likely to reach >90% in ‘26 which we believe is likely to trigger high NA orders in H1/H2 26 for insertion for A14 2nd gen (tools in 2027-28, mass production 29).

Our analysis suggests that High NA could account for 15-20% of system sales by the end of the decade, driving a 3-5 percentage point increase in lithography intensity share due to cost reductions achieved in critical layers of other manufacturing processes, such as deposition and etching. As for catalysts, we view the SPIE industry event scheduled for February 22-26 as a key date to monitor progress toward achieving >90% readiness for High NA, which may pave the way for its adoption in 2027 for the A14 2nd/3rd generation node. Furthermore, we believe the introduction of High NA is significantly more impactful for ASML compared to low NA multi-patterning, as High NA results in a greater lithography share, whereas multi-patterning leads to a lower lithography share. This dynamic could meaningfully influence ASML’s valuation premium relative to its peers.

ASML is trading at a c20% premium relative to U.S. peers, compared to its 10y historical average of 86% with positioning near the all-time low range of 5-15%. Given High NA could add 3 to 5 percentage point WFE share relative to US peers we believe high NA is not only important for EPS but could trigger further upside to relative premium multiple to a more normalised level vs history of around 40-60%.”

The other reason we like ASML is that TSMC capex is still fairly depressed. TSMC built up a lot of N7 capacity during the covid semi boom and has been able to shift those tools to strengthen its N5 and N3 lines during the AI boom. However, this tailwind in terms of lower required capex should now be dying down, and with all capacity TSMC is planning, it looks likely that we’re looking at a bull case for semicap. Even modeling in moderate capex-to-revenues levels for the coming years, capex comes out much higher than what the market is expecting:

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On Micron’s earnings call this week, it became clear that AI demand continues to strengthen:

“Server unit demand has strengthened significantly, and we now expect calendar 2025, server unit growth in the high teens percentage range, higher than our last earnings call outlook of 10%. We expect server demand strength to continue in 2026.

In the medium term, we are only able to meet about 50% to 2/3 of our demand from several key customers. So we remain extremely focused on trying to increase the supply here and making the necessary investments.”

Obviously this bodes well when it comes to litho demand from the memory market. Especially as the key driver of memory demand, HBM, is extremely capex intensive. This is again Micron’s CEO:

“The dramatic increase in HBM demand is further challenging the supply environment due to the 3 to 1 trade ratio with DDR5 and this trade ratio only increases with future generations of HBM. Additional cleanroom space is necessary to address this increased demand and lead times for cleanroom build-out are lengthening across geographies.”

We wouldn’t worry about China’s Manhattan project to produce EUV tools at this stage. Even if China produces the tools by the end of this decade, it seems unlikely that the US will allow any of the semi manufacturers amongst its allies to purchase that equipment; so that includes TSMC, Samsung, SK Hynix, and obviously Micron and Intel. Similarly, Western enterprises are focused on reducing Chinese components in their supply chains and this trend will only continue to strengthen with the recent Nexperia debacle.

So, even if Chinese EUV tools will see adoption by 2030 or so, which is a big if, we see the risk as fairly limited to ASML at this stage. ASML can’t sell their EUV tools into China anymore anyways, and so Chinese EUV tools will mainly be sold to SMIC and the Chinese memory players. Where it would impact ASML is on their Chinese immersion business, as the likes of SMIC have been purchasing plenty of those to do multiple patterning and still produce fairly advanced silicon of around N7 levels.

ASML’s valuation still remains fairly reasonable, while we should be looking at a bull case in demand in the coming years:

Next, we will dive into market share movements in XPUs vs GPUs, and Broadcom’s sell off.

XPUs vs GPUs

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